- IPMI (Intelligent Platform Management Interface)
- https://www.intel.com/
content/www/us/en/products/ docs/servers/ipmi/ipmi-home. html - 여러 대의 computer로 구성되는 server system 의 관리에 있어, 각 computer의 구성 정보를 기술하고, 동작 상태를 확인하거나 변경할 수 있는 방안을 표준화 한 것.
- 더 이상 활동하지 않고, Redfish와 같은 더 많은 기능이 있는 최신 interface 의 채택을 권유.
- Redfish
- https://redfish.dmtf.org/
- https://youtu.be/nBCjuuOjxRQ?si=4iZHN2sqltDHV17F
- 각 정보는 JSON 형식으로 기술되며, REST protocol 로 통신.
- JSON (Java Script Object Notation) : Javascript 에서 유래된 key/value 쌍 형태의 표준화 된 정보 기술 방법.
- REST (REpresentational State Transfer) : HTTP 기반 표준 통신 방안.
Notes of Gomtree
2024년 2월 25일 일요일
IMPI to Redfish
Intel BMC 에서 MCTP over PCIe VDM 통신 경로 분석
- Intel BMC GitHub : https://github.com/orgs/Intel-BMC/repositories?type=all
- libmctp
- astpcie.h 에서 선언된 참조 device file
- /* driver device file */
#define AST_DRV_FILE "/dev/aspeed-mctp" - https://github.com/Intel-BMC/libmctp/blob/master/astpcie.h
- astpcie.c
- 위 file 을 open 하여 ioctl(), write, read 하여 통신.
- https://github.com/Intel-BMC/libmctp/blob/master/astpcie.c
- kernel 의 aspeed-mctp device driver
- drivers/soc/aspeed/aspeed-mctp.c
- AST2600 의 MCTP controller HW 에 access 하여 PCIe VDM MCTP 통신 수행
- https://github.com/Intel-BMC/linux/blob/dev-5.15-intel/drivers/soc/aspeed/aspeed-mctp.c
- AST2600 datasheet 에서 내용 확인 필요.
2024년 2월 17일 토요일
BMC chipset
출처: ASPEED - AST2600
AST2600
AST2600 is ASPEED's 7th generation Server Management Processor, and also the world's first BMC SoC adopting 28nm advanced process technology. Adopting the Dual-core ARM Cortex A7 processor, AST2600 can optimize the performance and computing power; also lower the power consumption significantly. Also, AST2600 support Secure Boot mode and ARM Cortex A7 TrustZone, which can provide customers excellent information security protection.
Embedded CPU |
|
SDRAM Memory |
|
Flash Memory | SPI flash memory SPI flash memory |
Video-Over-IP |
|
USB-Over-IP |
|
BMC |
|
VGA |
|
VGA Drivers |
|
LAN | Quad 10/100/1000M bps MAC |
Technology | 624-pin 21mmx21mm TFBGA package |
Pin Compatibility | AST2620 |
2023년 11월 10일 금요일
2023년 9월 22일 금요일
Android kernel source code
- Google Android kernel source (official)
- https://android.googlesource.com/kernel/common/
- git clone https://android.googlesource.com/kernel/common
- kernel code update
- git reset --hard HEAD
- git pull
- show current branch
- git branch
- git branch transition
- git checkout <branch-name>
- update code to up-to-date code
- git pull
- show log
- git log
- git log --author <name>
- delete a local branch
- git branch -d <branch-name>
2023년 5월 7일 일요일
ARM Custom Instructions and memory access
https://developer.arm.com/documentation/102900/0100/?lang=en
Arm Custom Instructions have some deliberate restrictions to help avoid implementation issues:
- They cannot directly access memory or inputs/outputs outside the processor.
- They cannot have their own register states.
Both restrictions above are necessary for enforcing security since the Arm architecture has clear definitions for secure accesses. If the Arm Custom Instruction were to define their own state (by having their own registers) or their own path to memory, the architecture can no longer claim to enforce security. An interrupt that forces a transition between Secure and Non-secure modes of execution could possibly lead to leaking of secure state from the custom execution logic block. For hardware accelerators that need internal state or direct memory access, the existing coprocessor interface feature can be a suitable solution.